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5

1

I've seen that make is useful for large projects, especially with confusing dependencies described in a Makefile, and also helping with workflow. 
I haven't heard any advantages for using make for small projects. 
Are there any?

scripting compiling make development

share|improve this question

edited 45 mins ago

G-Man

13.3k93566

asked 7 hours ago

Goodwin LuGoodwin Lu

284

New contributor

Goodwin Lu is a new contributor to this site. Take care in asking for clarification, commenting, and answering.
Check out our Code of Conduct.

• 
  
  
  

  
  2
  

  
  
  
  
  
  

  
  
  optimism for growth? :) good habits? This might stray into opinion territory.
  
  – Jeff Schaller
  7 hours ago
  

  
  
  
  


• 
  
  
  

  
  

  
  
  
  
  
  

  
  
  type make to discover the answer. make a decent template Makefile and just edit its source files variable. no need to type all that jazz.
  
  – user2497
  6 hours ago
  

  
  
  
  


• 
  
  
  

  
  

  
  
  
  
  
  

  
  
  they're kind of a nightmare for large projects, so honestly, i'd say they're only good for small projects ;)
  
  – Eevee
  5 hours ago
  

  
  
  
  


• 
  
  
  

  
  

  
  
  
  
  
  

  
  
  I could use makefiles, but I don't. I've divided my source code for my biggest (personal) project into 10 files, recompile the first, and the first has #includes for the other nine. With the speed of recompilation, it doesn't matter to me if it all gets recompiled every time.
  
  – Jennifer
  3 hours ago
  

  
  
  
  


• 
  
  
  

  
  

  
  
  
  
  
  

  
  
  @Jennifer So what happens if your project starts to require special compiler or linker commands? You just remember them and hope that in a year or so when you get back you'll still get them right? What if you want to share it with someone else? (that said makefiles are an awful way to go about this for anything non-trivial, I agree with Eevee on that one)
  
  – Voo
  2 hours ago
  
  
  

  
  
  
  

add a comment | 

5

1

I've seen that make is useful for large projects, especially with confusing dependencies described in a Makefile, and also helping with workflow. 
I haven't heard any advantages for using make for small projects. 
Are there any?

scripting compiling make development

share|improve this question

edited 45 mins ago

G-Man

13.3k93566

asked 7 hours ago

Goodwin LuGoodwin Lu

284

New contributor

Goodwin Lu is a new contributor to this site. Take care in asking for clarification, commenting, and answering.
Check out our Code of Conduct.

• 
  
  
  

  
  2
  

  
  
  
  
  
  

  
  
  optimism for growth? :) good habits? This might stray into opinion territory.
  
  – Jeff Schaller
  7 hours ago
  

  
  
  
  


• 
  
  
  

  
  

  
  
  
  
  
  

  
  
  type make to discover the answer. make a decent template Makefile and just edit its source files variable. no need to type all that jazz.
  
  – user2497
  6 hours ago
  

  
  
  
  


• 
  
  
  

  
  

  
  
  
  
  
  

  
  
  they're kind of a nightmare for large projects, so honestly, i'd say they're only good for small projects ;)
  
  – Eevee
  5 hours ago
  

  
  
  
  


• 
  
  
  

  
  

  
  
  
  
  
  

  
  
  I could use makefiles, but I don't. I've divided my source code for my biggest (personal) project into 10 files, recompile the first, and the first has #includes for the other nine. With the speed of recompilation, it doesn't matter to me if it all gets recompiled every time.
  
  – Jennifer
  3 hours ago
  

  
  
  
  


• 
  
  
  

  
  

  
  
  
  
  
  

  
  
  @Jennifer So what happens if your project starts to require special compiler or linker commands? You just remember them and hope that in a year or so when you get back you'll still get them right? What if you want to share it with someone else? (that said makefiles are an awful way to go about this for anything non-trivial, I agree with Eevee on that one)
  
  – Voo
  2 hours ago
  
  
  

  
  
  
  

add a comment | 

I've seen that make is useful for large projects, especially with confusing dependencies described in a Makefile, and also helping with workflow. 
I haven't heard any advantages for using make for small projects. 
Are there any?

scripting compiling make development

share|improve this question

edited 45 mins ago

G-Man

13.3k93566

asked 7 hours ago

Goodwin LuGoodwin Lu

284

New contributor

Goodwin Lu is a new contributor to this site. Take care in asking for clarification, commenting, and answering.
Check out our Code of Conduct.

share|improve this question

edited 45 mins ago

G-Man

13.3k93566

asked 7 hours ago

Goodwin LuGoodwin Lu

284

New contributor

Goodwin Lu is a new contributor to this site. Take care in asking for clarification, commenting, and answering.
Check out our Code of Conduct.

share|improve this question

edited 45 mins ago

G-Man

13.3k93566

asked 7 hours ago

Goodwin LuGoodwin Lu

284

New contributor

Goodwin Lu is a new contributor to this site. Take care in asking for clarification, commenting, and answering.
Check out our Code of Conduct.

edited 45 mins ago

G-Man

13.3k93566

edited 45 mins ago

G-Man

13.3k93566

asked 7 hours ago

Goodwin LuGoodwin Lu

284

New contributor

Goodwin Lu is a new contributor to this site. Take care in asking for clarification, commenting, and answering.
Check out our Code of Conduct.

asked 7 hours ago

Goodwin LuGoodwin Lu

284

4 Answers
4

active

oldest

votes

5

As opposed to what?

Suppose you have a program that you have split into two files,
which you have imaginatively named file1.c and file2.c. 
You can compile the program by running

cc file1.c file2.c -o yourprogram

But this requires recompiling both files every time,
even if only one has changed. 
You can decompose the compilation steps into

cc -c file1.c

cc -c file2.c

cc    file1.o file2.o -o yourprogram

and then, when you edit one of the files, recompile only that file
(and perform the linking step no matter what you changed). 
But what if you edit one file, and then the other,
and you forget that you edited both files,
and accidentally recompile only one?

Also, even for just two files,
you’ve got about 60 characters’ worth of commands there. 
That quickly gets tedious to type. 
OK, sure, you could put them into a script,
but then you’re back to recompiling every time. 
Or you could write a really fancy, complicated script that checks
what file(s) had been modified and does only the necessary compilations. 
Do you see where I’m going with this?

share|improve this answer

answered 7 hours ago

G-ManG-Man

13.3k93566

• 
  
  
  

  
  

  
  
  
  
  
  

  
  
  For very small projects, gcc -O3 -march=native -fwhole-program *.c is basically fine for an edit / compile / profile cycle. But you still want a Makefile for other people to use. Being able to use -fwhole-program is a fun advantage of compiling everything together, but -flto normally gives you pretty much the same optimizations.
  
  – Peter Cordes
  3 hours ago
  

  
  
  
  


• 
  
  
  

  
  

  
  
  
  
  
  

  
  
  Once I start adding switches to the compiler command line (even for one source file), I find it gets tricky to remember them the next time. Occasionally I'll just put a comment in the source file, but at that point I should just use a Makefile...
  
  – Roger Lipscombe
  2 hours ago
  

  
  
  
  

add a comment | 

4

Even with small project it can be helpful keeping the dependency logic under control and builds automated. I also used it to trigger installs and deinstallations, so it was a main switch resetting the stage.

share|improve this answer

answered 7 hours ago

TomaszTomasz

9,91652966

add a comment | 

1

A lot of other people are getting into the details of more complex makefiles and a lot of the complexity that comes with them. I typically use makefiles for a completely different reason:

I don't want to remember anything.

Even if your project is really boring and simple, and you don't use makefiles "correctly":

all:

    gcc main.c -o project

I don't need to think about it or treat it any differently than a project that's more complex:

all:

    gcc libA.c libB.c main.c -o project2

Or if I specified flags (e.g. -O2) I don't need to remember what they were.

Also, if you start with a simple makefile, and you need to merge/refactor things later, you don't need to remember to build every project differently.

share|improve this answer

answered 1 hour ago

Stack TracerStack Tracer

1134

add a comment | 

0

If you link your app from 2 sources (.c files) , you do not need to recompile each file, but only the changed one if you are using make.

Also, I will give you example from BSD world. They have framework of system-based Makefiles. They provide you paths to system directories and have targets to install your software and manual pages.

For example, you just wrote beer.c app and manual for it called beer.6.
You create Makefile:

PROG=   beer

MAN=    beer.6



.include <bsd.prog.mk>

..and call make install. It automatically compiles and installs your app to /usr/bin and compiles and installs your man page to the place where man can find it. You just installed your app with one simple command!

Very convenient and absolutely transparent for anyone who is familiar with BSD.
Much better than manual script.

share|improve this answer

answered 1 hour ago

user996142user996142

40239

add a comment | 

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5

As opposed to what?

Suppose you have a program that you have split into two files,
which you have imaginatively named file1.c and file2.c. 
You can compile the program by running

cc file1.c file2.c -o yourprogram

But this requires recompiling both files every time,
even if only one has changed. 
You can decompose the compilation steps into

cc -c file1.c

cc -c file2.c

cc    file1.o file2.o -o yourprogram

and then, when you edit one of the files, recompile only that file
(and perform the linking step no matter what you changed). 
But what if you edit one file, and then the other,
and you forget that you edited both files,
and accidentally recompile only one?

Also, even for just two files,
you’ve got about 60 characters’ worth of commands there. 
That quickly gets tedious to type. 
OK, sure, you could put them into a script,
but then you’re back to recompiling every time. 
Or you could write a really fancy, complicated script that checks
what file(s) had been modified and does only the necessary compilations. 
Do you see where I’m going with this?

share|improve this answer

answered 7 hours ago

G-ManG-Man

13.3k93566

• 
  
  
  

  
  

  
  
  
  
  
  

  
  
  For very small projects, gcc -O3 -march=native -fwhole-program *.c is basically fine for an edit / compile / profile cycle. But you still want a Makefile for other people to use. Being able to use -fwhole-program is a fun advantage of compiling everything together, but -flto normally gives you pretty much the same optimizations.
  
  – Peter Cordes
  3 hours ago
  

  
  
  
  


• 
  
  
  

  
  

  
  
  
  
  
  

  
  
  Once I start adding switches to the compiler command line (even for one source file), I find it gets tricky to remember them the next time. Occasionally I'll just put a comment in the source file, but at that point I should just use a Makefile...
  
  – Roger Lipscombe
  2 hours ago
  

  
  
  
  

add a comment | 

5

As opposed to what?

Suppose you have a program that you have split into two files,
which you have imaginatively named file1.c and file2.c. 
You can compile the program by running

cc file1.c file2.c -o yourprogram

But this requires recompiling both files every time,
even if only one has changed. 
You can decompose the compilation steps into

cc -c file1.c

cc -c file2.c

cc    file1.o file2.o -o yourprogram

and then, when you edit one of the files, recompile only that file
(and perform the linking step no matter what you changed). 
But what if you edit one file, and then the other,
and you forget that you edited both files,
and accidentally recompile only one?

Also, even for just two files,
you’ve got about 60 characters’ worth of commands there. 
That quickly gets tedious to type. 
OK, sure, you could put them into a script,
but then you’re back to recompiling every time. 
Or you could write a really fancy, complicated script that checks
what file(s) had been modified and does only the necessary compilations. 
Do you see where I’m going with this?

share|improve this answer

answered 7 hours ago

G-ManG-Man

13.3k93566

• 
  
  
  

  
  

  
  
  
  
  
  

  
  
  For very small projects, gcc -O3 -march=native -fwhole-program *.c is basically fine for an edit / compile / profile cycle. But you still want a Makefile for other people to use. Being able to use -fwhole-program is a fun advantage of compiling everything together, but -flto normally gives you pretty much the same optimizations.
  
  – Peter Cordes
  3 hours ago
  

  
  
  
  


• 
  
  
  

  
  

  
  
  
  
  
  

  
  
  Once I start adding switches to the compiler command line (even for one source file), I find it gets tricky to remember them the next time. Occasionally I'll just put a comment in the source file, but at that point I should just use a Makefile...
  
  – Roger Lipscombe
  2 hours ago
  

  
  
  
  

add a comment | 

As opposed to what?

Suppose you have a program that you have split into two files,
which you have imaginatively named file1.c and file2.c. 
You can compile the program by running

cc file1.c file2.c -o yourprogram

But this requires recompiling both files every time,
even if only one has changed. 
You can decompose the compilation steps into

cc -c file1.c

cc -c file2.c

cc    file1.o file2.o -o yourprogram

and then, when you edit one of the files, recompile only that file
(and perform the linking step no matter what you changed). 
But what if you edit one file, and then the other,
and you forget that you edited both files,
and accidentally recompile only one?

Also, even for just two files,
you’ve got about 60 characters’ worth of commands there. 
That quickly gets tedious to type. 
OK, sure, you could put them into a script,
but then you’re back to recompiling every time. 
Or you could write a really fancy, complicated script that checks
what file(s) had been modified and does only the necessary compilations. 
Do you see where I’m going with this?

share|improve this answer

answered 7 hours ago

G-ManG-Man

13.3k93566

cc file1.c file2.c -o yourprogram

cc -c file1.c

cc -c file2.c

cc    file1.o file2.o -o yourprogram

share|improve this answer

answered 7 hours ago

G-ManG-Man

13.3k93566

answered 7 hours ago

G-ManG-Man

13.3k93566

answered 7 hours ago

G-ManG-Man

13.3k93566

4

Even with small project it can be helpful keeping the dependency logic under control and builds automated. I also used it to trigger installs and deinstallations, so it was a main switch resetting the stage.

share|improve this answer

answered 7 hours ago

TomaszTomasz

9,91652966

add a comment | 

4

Even with small project it can be helpful keeping the dependency logic under control and builds automated. I also used it to trigger installs and deinstallations, so it was a main switch resetting the stage.

share|improve this answer

answered 7 hours ago

TomaszTomasz

9,91652966

add a comment | 

Even with small project it can be helpful keeping the dependency logic under control and builds automated. I also used it to trigger installs and deinstallations, so it was a main switch resetting the stage.

share|improve this answer

answered 7 hours ago

TomaszTomasz

9,91652966

share|improve this answer

answered 7 hours ago

TomaszTomasz

9,91652966

answered 7 hours ago

TomaszTomasz

9,91652966

answered 7 hours ago

TomaszTomasz

9,91652966

1

A lot of other people are getting into the details of more complex makefiles and a lot of the complexity that comes with them. I typically use makefiles for a completely different reason:

I don't want to remember anything.

Even if your project is really boring and simple, and you don't use makefiles "correctly":

all:

    gcc main.c -o project

I don't need to think about it or treat it any differently than a project that's more complex:

all:

    gcc libA.c libB.c main.c -o project2

Or if I specified flags (e.g. -O2) I don't need to remember what they were.

Also, if you start with a simple makefile, and you need to merge/refactor things later, you don't need to remember to build every project differently.

share|improve this answer

answered 1 hour ago

Stack TracerStack Tracer

1134

add a comment | 

1

A lot of other people are getting into the details of more complex makefiles and a lot of the complexity that comes with them. I typically use makefiles for a completely different reason:

I don't want to remember anything.

Even if your project is really boring and simple, and you don't use makefiles "correctly":

all:

    gcc main.c -o project

I don't need to think about it or treat it any differently than a project that's more complex:

all:

    gcc libA.c libB.c main.c -o project2

Or if I specified flags (e.g. -O2) I don't need to remember what they were.

Also, if you start with a simple makefile, and you need to merge/refactor things later, you don't need to remember to build every project differently.

share|improve this answer

answered 1 hour ago

Stack TracerStack Tracer

1134

add a comment | 

A lot of other people are getting into the details of more complex makefiles and a lot of the complexity that comes with them. I typically use makefiles for a completely different reason:

I don't want to remember anything.

Even if your project is really boring and simple, and you don't use makefiles "correctly":

all:

    gcc main.c -o project

I don't need to think about it or treat it any differently than a project that's more complex:

all:

    gcc libA.c libB.c main.c -o project2

Or if I specified flags (e.g. -O2) I don't need to remember what they were.

Also, if you start with a simple makefile, and you need to merge/refactor things later, you don't need to remember to build every project differently.

share|improve this answer

answered 1 hour ago

Stack TracerStack Tracer

1134

all:

    gcc main.c -o project

all:

    gcc libA.c libB.c main.c -o project2

share|improve this answer

answered 1 hour ago

Stack TracerStack Tracer

1134

answered 1 hour ago

Stack TracerStack Tracer

1134

answered 1 hour ago

Stack TracerStack Tracer

1134

0

If you link your app from 2 sources (.c files) , you do not need to recompile each file, but only the changed one if you are using make.

Also, I will give you example from BSD world. They have framework of system-based Makefiles. They provide you paths to system directories and have targets to install your software and manual pages.

For example, you just wrote beer.c app and manual for it called beer.6.
You create Makefile:

PROG=   beer

MAN=    beer.6



.include <bsd.prog.mk>

..and call make install. It automatically compiles and installs your app to /usr/bin and compiles and installs your man page to the place where man can find it. You just installed your app with one simple command!

Very convenient and absolutely transparent for anyone who is familiar with BSD.
Much better than manual script.

share|improve this answer

answered 1 hour ago

user996142user996142

40239

add a comment | 

0

If you link your app from 2 sources (.c files) , you do not need to recompile each file, but only the changed one if you are using make.

Also, I will give you example from BSD world. They have framework of system-based Makefiles. They provide you paths to system directories and have targets to install your software and manual pages.

For example, you just wrote beer.c app and manual for it called beer.6.
You create Makefile:

PROG=   beer

MAN=    beer.6



.include <bsd.prog.mk>

..and call make install. It automatically compiles and installs your app to /usr/bin and compiles and installs your man page to the place where man can find it. You just installed your app with one simple command!

Very convenient and absolutely transparent for anyone who is familiar with BSD.
Much better than manual script.

share|improve this answer

answered 1 hour ago

user996142user996142

40239

add a comment | 

If you link your app from 2 sources (.c files) , you do not need to recompile each file, but only the changed one if you are using make.

Also, I will give you example from BSD world. They have framework of system-based Makefiles. They provide you paths to system directories and have targets to install your software and manual pages.

For example, you just wrote beer.c app and manual for it called beer.6.
You create Makefile:

PROG=   beer

MAN=    beer.6



.include <bsd.prog.mk>

..and call make install. It automatically compiles and installs your app to /usr/bin and compiles and installs your man page to the place where man can find it. You just installed your app with one simple command!

Very convenient and absolutely transparent for anyone who is familiar with BSD.
Much better than manual script.

share|improve this answer

answered 1 hour ago

user996142user996142

40239

PROG=   beer

MAN=    beer.6



.include <bsd.prog.mk>

share|improve this answer

answered 1 hour ago

user996142user996142

40239

answered 1 hour ago

user996142user996142

40239

answered 1 hour ago

user996142user996142

40239